Automatic implementation of FIR filters on field programmable gate arrays

Author

Mohanakrishnan, Satish ; Evans, Joseph B.

Author_Institution

Telecommun. & Inf. Sci. Lab., Kansas Univ., Lawrence, KS, USA

Volume

2

Issue

3

fYear

1995

fDate

3/1/1995 12:00:00 AM

Firstpage

51

Lastpage

53

Abstract

This letter describes a CAD system for automatic implementation of FIR filters on Xilinx field programmable gate arrays (FPGA). Given the frequency specifications, this software package designs an FIR filter, optimizes the filter coefficients in the power of two coefficient space, and implements it on FPGA chips. The FPGA specific mapping techniques used to increase speed are discussed. The performance of the typical filters that were implemented is presented.<>

Keywords

FIR filters; circuit CAD; circuit optimisation; field programmable gate arrays; CAD system; FIR filters; FPGA chips; Xilinx field programmable gate arrays; automatic implementation; filter coefficients; frequency specifications; high speed VLSI implementation; performance; software package; Design automation; Design optimization; Field programmable gate arrays; Finite impulse response filter; Frequency; Graphical user interfaces; Routing; Sampling methods; Software design; Software packages;

fLanguage

English

Journal_Title

Signal Processing Letters, IEEE

Publisher

ieee

ISSN

1070-9908

Type

jour

DOI

10.1109/97.372915

Filename

372915