• DocumentCode
    756067
  • Title

    Quantum-mechanical modeling of accumulation layers in MOS structure

  • Author

    Suné, Jordi ; Olivo, Piero ; Riccò, Bruno

  • Author_Institution
    DEIS, Bologna Univ., Italy
  • Volume
    39
  • Issue
    7
  • fYear
    1992
  • fDate
    7/1/1992 12:00:00 AM
  • Firstpage
    1732
  • Lastpage
    1739
  • Abstract
    An original method is used for the quantum-mechanical modeling of n-type silicon accumulation layers. Unlike previous methods, which were only valid near 4.2 K, the approach is valid up to room temperature and beyond. The self-consistent results obtained are compared with those of the standard classical model for the accumulation layer, and the differences between them are found to be relevant for the modeling of important device applications. The dependences of the accumulation voltage drop and effective F-N (Fowler-Nordheim) barrier height on oxide electric field and substrate dopine are reported. Experimental F-N current-voltage characteristics of production-quality MOS capacitors are used to validate the quantum results and to show that the standard classical model is not adequate even if the barrier height is considered as a fitting parameter. Approximate analytical expressions giving the semiconductor voltage drop and the effective F-N barrier height as a function of oxide field and substrate doping are derived for <100> and <111> n-type silicon at 77 and 300 K
  • Keywords
    accumulation layers; doping profiles; metal-insulator-semiconductor devices; metal-insulator-semiconductor structures; semiconductor device models; 300 K; 77 K; MOS structure; accumulation layers; current-voltage characteristics; device applications; effective Fowler-Nordheim barrier height; oxide electric field; oxide field; production-quality MOS capacitors; quantum-mechanical modeling; semiconductor voltage drop; substrate doping; Charge carrier processes; Current-voltage characteristics; Predictive models; Quantization; Semiconductor device doping; Silicon; Solid modeling; Substrates; Temperature distribution; Voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.141240
  • Filename
    141240