Characterization of Distribution of Trap States in Silicon-on-Insulator Layers by Front-Gate Characteristics in n-Channel SOI MOSFETs

We characterized the distribution of trap states in silicon-on-insulator (SOI) layers in epitaxial layer transfer (ELTRAN) wafers and in low-dose separation by implanted oxygen (SIMOX) wafers. We measured the front- and back-gate characteristics of MOSFETs with SOI layers of different thicknesses. We used the current-Terman method to estimate the trap states at the gate oxide (GOX)/SOI interface and at the SOI/buried oxide (BOX) interface separately. As a result, we concluded that the high-density trap states in the SOI layers in SIMOX wafers cause a gate-voltage shift, which is attributed to the charged trap states only in the inversion layer. We also found that the trap states are distributed within about 30 nm from the SOI/BOX interface in the SOI layer in SIMOX wafers, which indicates that the distribution of trap states originates from the oxygen implantation that is peculiar to the SIMOX process.