Title :
Improving the Retention and Endurance Characteristics of Charge-Trapping Memory by Using Double Quantum Barriers
Author :
Lin, S.H. ; Yang, H.J. ; Chen, W.B. ; Yeh, F.S. ; McAlister, Sean P. ; Chin, Albert
Author_Institution :
Dept. of Electr. Eng., Nat. Tsing-Hua Univ., Hsinchu
fDate :
7/1/2008 12:00:00 AM
Abstract :
We have studied the performance of double-quantum-barrier [TaN-Ir3Si]-[HfAlO-LaAlO3]-Hf0.3N0.2O0.5-[HfAlO-SiO2]-Si charge-trapping memory devices. These devices display good characteristics in terms of their plusmn9-V program/erase (P/E) voltage, 100-mus P/E speed, initial 3.2-V memory window, and ten-year extrapolated data retention window of 2.4 V at 150 degC. The retention decay rate is significantly better than single-barrier MONOS devices, as is the cycled retention data, due to the reduced interface trap generation.
Keywords :
MIS devices; MOS memory circuits; dielectric devices; elemental semiconductors; hafnium compounds; high-k dielectric thin films; iridium compounds; lanthanum compounds; random-access storage; silicon; silicon compounds; tantalum compounds; [TaN-Ir3Si]-[HfAlO-LaAlO3]-Hf0.3N0.2O0.5-[HfAlO-SiO2]-Si; charge-trapping memory devices; double quantum barriers; extrapolated data retention; high-k materials; interface trap generation; memory window; nonvolatile memory; program-erase voltage; single-barrier MONOS devices; temperature 150 C; voltage 2.4 V; Councils; Displays; Hafnium; MONOS devices; Nanoelectronics; Nonvolatile memory; SONOS devices; Senior members; Temperature; Voltage; Erase; high- $kappa$; nonvolatile memory; program;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2008.924435
