DocumentCode
756636
Title
A Monolithic Phase-Locked Loop with Post Detection Processor
Author
Murthi, Enjeti N.
Author_Institution
Signetics Corp., Sunnyvale, CA
Volume
27
Issue
2
fYear
1979
fDate
2/1/1979 12:00:00 AM
Firstpage
413
Lastpage
419
Abstract
This paper details the design and fabrication of a highfrequency (50-MHz) phase-locked loop with a post detection processor which allows the detection of FSK signals with few external components. The circuit operates with a single 5-V supply and has TTL compatible inputs and outputs.
Keywords
Bipolar analog integrated circuits; Bipolar integrated circuits, analog; FSK modulation/demodulation; PLLs; Phase-locked loop (PLL); Circuits; Demodulation; Frequency shift keying; Phase detection; Phase frequency detector; Phase locked loops; Schottky diodes; Signal processing; Voltage; Voltage-controlled oscillators;
fLanguage
English
Journal_Title
Communications, IEEE Transactions on
Publisher
ieee
ISSN
0090-6778
Type
jour
DOI
10.1109/TCOM.1979.1094408
Filename
1094408
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