DocumentCode
756871
Title
Multiple-terminal gate charging effect - competing/compensating charging behavior
Author
Lin, Wallace ; Sery, George
Author_Institution
Intel Corp., Santa Clara, CA, USA
Volume
24
Issue
7
fYear
2003
fDate
7/1/2003 12:00:00 AM
Firstpage
481
Lastpage
483
Abstract
The charging effect from the antenna at the multiple nodes of MOSFET devices was investigated using bulk-CMOS technology. We demonstrated experimentally that the antenna size at source and drain terminals can modulate gate charging behavior, just like that at the gate terminal. However, gate charging damage is lessened when the source and/or drain antenna size increases, which is an effect opposite to that of the gate antenna. The effect can be explained by a multiple-terminal gate charging model, revealing the competing and compensating nature of the incoming charging current among the gate, source, and drain terminal of the MOSFET. The model also indicates a similar effect for the N-well antenna in P MOSFETs. The finding here leads to an application that actually utilizes metal antennae to protect gate oxide in realistic circuits.
Keywords
CMOS integrated circuits; MOSFET; equivalent circuits; integrated circuit modelling; MOSFET devices; N-well antenna; antenna size; bulk-CMOS technology; competing/compensating charging behavior; gate charging damage; incoming charging current; metal antennae; model; multiple-terminal gate charging effect; Equivalent circuits; Etching; Integrated circuit interconnections; Lead compounds; MOSFET circuits; Manufacturing processes; Plasma applications; Protection; Semiconductor device modeling; Testing;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2003.814997
Filename
1217304
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