DocumentCode
756889
Title
BEE2: a high-end reconfigurable computing system
Author
Chang, Chen ; Wawrzynek, John ; Brodersen, Robert W.
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Volume
22
Issue
2
fYear
2005
Firstpage
114
Lastpage
125
Abstract
The Berkeley Emulation Engine 2 (BEE2) project is developing a reusable, modular, and scalable framework for designing high-end reconfigurable computers, including a processing-module building block and several programming models. Using these elements, BEE2 can provide over 10 times more computing throughput than a DSP-based system with similar power consumption and cost and over 100 times that of a microprocessor-based system.
Keywords
digital signal processing chips; microprocessor chips; performance evaluation; real-time systems; reconfigurable architectures; Berkeley Emulation Engine 2; DSP-based system; high-end reconfigurable computing system; microprocessor-based system; processing-module building block; Application software; Computational modeling; Digital signal processing; Digital signal processing chips; Emulation; Energy consumption; Field programmable gate arrays; Hardware; Radio astronomy; Throughput;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/MDT.2005.30
Filename
1413144
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