DocumentCode
757544
Title
50 nm MOSFETs with side-gates for induced source/drain extension
Author
Choi, B.Y. ; Choi, W.Y. ; Lee, J.D. ; Park, B.G.
Author_Institution
Coll. of Eng., Seoul Nat. Univ., South Korea
Volume
38
Issue
11
fYear
2002
fDate
5/23/2002 12:00:00 AM
Firstpage
526
Lastpage
527
Abstract
50 nm long MOSFETs with side-gates were optimised in terms of the side-gate length and successfully fabricated with conventional MOS technology. The simulated and fabricated 50 nm long MOSFET shows a reasonable subthreshold swing of 81 mV/dec and a low drain induced barrier lowering of 77 mV
Keywords
MOSFET; hot carriers; 50 nm; MOS technology; MOSFET; hot carrier effects; induced source/drain extension; low drain induced barrier lowering; side-gate length; subthreshold swing;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20020365
Filename
1006799
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