DocumentCode :
757942
Title :
Characterization of polysilicon-gate depletion in MOS structures
Author :
Riccò, B. ; Versari, R. ; Esseni, D.
Author_Institution :
Dept. of Electron., Bologna Univ., Italy
Volume :
17
Issue :
3
fYear :
1996
fDate :
3/1/1996 12:00:00 AM
Firstpage :
103
Lastpage :
105
Abstract :
This paper presents a new technique to characterize the depletion capacitance and (active) impurity concentration of gate polysilicon in MOS transistors. The method has been validated by means of 2-D simulation; experimental results obtained with state-of-the-art n-channel 0.5 micrometer transistors are presented.
Keywords :
MOSFET; capacitance; silicon; 2D simulation; MOS transistors; active impurity concentration; depletion capacitance; n-channel transistors; polysilicon gate; CMOS technology; Capacitance measurement; Data mining; Doping; Impurities; MOSFETs; Monitoring; Numerical simulation; Semiconductor process modeling; Transconductance;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.485181
Filename :
485181
Link To Document :
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