DocumentCode :
758812
Title :
Charge-Pump Phase-Lock Loops
Author :
Gardner, Floyd M.
Author_Institution :
University Ave., Palo Alto, CA, USA
Volume :
28
Issue :
11
fYear :
1980
fDate :
11/1/1980 12:00:00 AM
Firstpage :
1849
Lastpage :
1858
Abstract :
Phase/frequency detectors deliver output in the form of three-state, digital logic. Charge pumps are utilized to convert the timed logic levels into analog quantities for controlling the locked oscillators. This paper analyzes typical charge-pump circuits, identifies salient features, and provides equations and graphs for the design engineer.
Keywords :
PLLs; Phase-locked loop (PLL); Bandwidth; Charge pumps; Circuit analysis; Filters; Logic; Phase frequency detector; Phase locked loops; Stability; Voltage control; Voltage-controlled oscillators;
fLanguage :
English
Journal_Title :
Communications, IEEE Transactions on
Publisher :
ieee
ISSN :
0090-6778
Type :
jour
DOI :
10.1109/TCOM.1980.1094619
Filename :
1094619
Link To Document :
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