A high resolution multibit sigma-delta modulator with individual level averaging

Author

Chen, Feng ; Leung, Bosco H.

Author_Institution

Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada

Volume

30

Issue

4

fYear

1995

fDate

4/1/1995 12:00:00 AM

Firstpage

453

Lastpage

460

Abstract

A second-order sigma-delta modulator with a 3-b internal quantizer employing the individual level averaging technique has been designed and implemented in a 1.2 μm CMOS technology. Testing results show no observable harmonic distortion components above the noise floor. Peak S/(N+D) ratio of 91 dB and dynamic range of 96 dB have been achieved at a clock rate of 2.56 MHz for a 20 kHz baseband. No tone is observed in the baseband as the amplitude of a 10 kHz input sine wave is reduced from -0.5 dB to -107 dB below the voltage reference. The active area of the prototype chip is 3.1 mm² and it dissipates 67.5 mW of power from a 5 V supply

Keywords

CMOS integrated circuits; circuit feedback; harmonic distortion; integrated circuit noise; modulators; sigma-delta modulation; 1.2 micron; 2.56 MHz; 20 kHz; 5 V; 67.5 mW; A/D convertors; ADC; CMOS technology; high resolution operation; individual level averaging; internal quantizer; multibit sigma-delta modulator; second-order type; Baseband; CMOS technology; Clocks; Delta-sigma modulation; Digital filters; Feedback; Quantization; Sequences; Signal resolution; Very large scale integration;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.375966

Filename

375966