Digital PCM Bit Synchronizer and Detector

This paper presents a theoretical analysis supported by practical measurements of a digital self-bit synchronizer and detector. This synchronizer is based on the generation of spectral line components by nonlinear filtering of the received bit stream, and extracting the line by a digital phase-locked loop (PLL). Data detection is realized by a digital matched filter (DMF). The interesting features of this realization are the short acquisition time and the all-digital structure.