DocumentCode :
762253
Title :
Voltage-Mode Driver Preemphasis Technique For On-Chip Global Buses
Author :
Zhang, Liang ; Wilson, John M. ; Bashirullah, Rizwan ; Luo, Lei ; Xu, Jian ; Franzon, Paul D.
Author_Institution :
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC
Volume :
15
Issue :
2
fYear :
2007
Firstpage :
231
Lastpage :
236
Abstract :
This paper demonstrates that driver preemphasis technique can be used for on-chip global buses to increase signal channel bandwidth. Compared to conventional repeater insertion techniques, driver preemphasis saves repeater layout complexity and reduces power consumption by 12%-39% for data activity factors above 0.1. A driver circuit architecture using voltage-mode preemphasis technique was tested in 0.18-mum CMOS technology for 10-mm long interconnects at 2 Gb/s
Keywords :
CMOS integrated circuits; VLSI; integrated circuit interconnections; low-power electronics; power consumption; repeaters; 0.18 micron; 10 mm; 2 Gbits/s; on-chip global buses; power consumption; repeater insertion techniques; signal channel bandwidth; voltage-mode driver preemphasis technique; Bandwidth; Delay; Driver circuits; Frequency; Integrated circuit interconnections; Intersymbol interference; Power system interconnection; Repeaters; Virtual manufacturing; Voltage; Global buses; low-power; on-chip; preemphasis; repeater insertion;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2007.893588
Filename :
4142786
Link To Document :
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