Title :
Estimation of FMAX and ISB in microprocessors
Author :
Abulafia, Yossi ; Kornfeld, Avner
Author_Institution :
Intel Corp., Haifa, Israel
Abstract :
Inherent process device variations and fluctuations during manufacturing have a large impact on the microprocessor maximum clock frequency and total leakage power. These fluctuations have a statistical distribution that calls for usage of statistical methods for frequency and leakage analysis. This paper presents a simple technique for accurate estimation of product high-level (Full Chip) parameters such as the maximum frequency (FMAX) distribution and the total leakage (ISB). Moreover, this technique can grade critical paths by their failure probability and perform what-if analysis to estimate FMAX after fixing specific speed paths. Using our FMAX/ISB prediction, we show good correlation with silicon measurements from a production microprocessor.
Keywords :
Monte Carlo methods; integrated circuit reliability; leakage currents; microprocessor chips; network analysis; statistical analysis; FMAX estimation; ISB estimation; critical path analysis; failure probability; frequency analysis; full chip parameters; high-level parameters; leakage analysis; maximum clock frequency; maximum frequency distribution; microprocessors; total leakage power; Clocks; Failure analysis; Fluctuations; Frequency estimation; Manufacturing processes; Microprocessors; Performance analysis; Probability; Statistical analysis; Statistical distributions; Critical path delay; FMAX distribution; die-to-die process variation; path-to-path correlation; spatial timing model (STM); static timing analysis (STA); statistical static timing analysis (SSTA); subthreshold leakage (ISB); systematic process variation; timing model (TM); within-die process fluctuation;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2005.859469
