DocumentCode :
764443
Title :
Memory Management in a Viterbi Decoder
Author :
Rader, Charles M.
Author_Institution :
MIT, Lincoln Laboratory, Lexington, MA, USA
Volume :
29
Issue :
9
fYear :
1981
fDate :
9/1/1981 12:00:00 AM
Firstpage :
1399
Lastpage :
1401
Abstract :
Management of the memory contents in a Viterbi decoder is a major design problem for both hardware and software realizations. In a naive implementation, every bit in the memory must be changed (read, modified, and rewritten) for each message bit decoded, and, in addition, some double buffering is required. An especially annoying feature is the need to read and rewrite long words, forty bits in a typical case. In this note we describe a memory organization which overcomes these problems. The techniques described here are not novel, but neither are they widely known.
Keywords :
Memory allocation; Viterbi decoding; Content management; Convolutional codes; Decoding; Delay; Error analysis; Hardware; Memory management; Memoryless systems; Shift registers; Viterbi algorithm;
fLanguage :
English
Journal_Title :
Communications, IEEE Transactions on
Publisher :
ieee
ISSN :
0090-6778
Type :
jour
DOI :
10.1109/TCOM.1981.1095146
Filename :
1095146
Link To Document :
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