Decoding Behavior Study of LDPC Codes Under a Realistic Magnetic Recording Channel Model

Author

Hu, Xinde ; Kumar, B Vijaya V K ; Sun, Lingyan ; Xie, Jin

Author_Institution

Data Storage Syst. Center, Carnegie Mellon Univ., Pittsburgh, PA

Volume

42

Issue

10

fYear

2006

Firstpage

2606

Lastpage

2608

Abstract

Low-density parity check (LDPC) codes have shown near-capacity performance in additive white Gaussian noise (AWGN) channels. However, in magnetic recording systems, the readback signals suffer from various impairments (namely, transition noise, nonlinear transition shift, and partial erasure) in addition to AWGN. In this paper, we describe an FPGA-based advanced magnetic recording channel simulator (that includes these impairments) and an LDPC coding system. The error correcting performances of LDPC codes in the presence of such realistic impairments are investigated down to bit error rate (BER) of 10^-11 and frame error rate (FER) of 10^-8

Keywords

AWGN channels; error statistics; field programmable gate arrays; magnetic recording; parity check codes; additive white Gaussian noise channels; advanced magnetic recording channel simulator; bit error rate; field programmable gate arrays; frame error rate; low-density parity check codes; readback signals; AWGN; Additive white noise; Bit error rate; Decoding; Error analysis; Error correction codes; Gaussian noise; Magnetic noise; Magnetic recording; Parity check codes; EPR4; FPGA; LDPC code; magnetic recording; nonlinear transition shift; partial erasure;

fLanguage

English

Journal_Title

Magnetics, IEEE Transactions on

Publisher

ieee

ISSN

0018-9464

Type

jour

DOI

10.1109/TMAG.2006.878652

Filename

1704379