Cost-performance analysis of cascaded crossbar interconnected multiprocessors

The cost performance ratio of interconnection networks for multiprocessors depends upon the connectivity of the network: the processing efficiency of these systems increases when the number of links and switches also increases. The authors study the performance of a class of interconnection networks in which processors and memory modules are grouped into stages, each consisting of a crossbar network. Each stage is connected to two neighbouring stages. A queueing model is presented to analyse cascaded crossbar architectures organised into bidirectional rings and operating under synchronous packet switching. Cost performance comparisons of various cascaded crossbar network configurations are presented. It is shown that, even with poor memory reference locality, it is preferable to have more stages and fewer processors per stage