Title :
Efficient parallel algorithms on optically interconnected arrays of processors
Author :
Hamdi, M. ; Pan, Y.
Author_Institution :
Dept. of Comput. Sci., Hong Kong Univ. of Sci. & Technol., Kowloon, Hong Kong
fDate :
3/1/1995 12:00:00 AM
Abstract :
Arrays of processors with pipelined optical buses are introduced for the efficient implementation of computationally intensive applications. Techniques for the concurrent transmission of messages over the optical bus to avoid collision of messages is shown. Convenient parallel data movement operations are derived for this architecture, which are then used in the design of parallel algorithms for the solution of some important numerical problems. The parallel algorithms implemented in the paper are for solving systems of linear equations and finding the roots of nonlinear equations. Even though this array of processors can function in the MIMD mode of operation, it is more suitable for the SIMD mode of operation, because it can be easily synchronised and scaled to a massive number of processors. Hence, the above parallel algorithms have been designed with the SIMD mode in mind. Their time complexities have been analysed, and are shown to compare favourably with those implemented on processors connected with electronic buses or point to point links such as the hypercube. Moreover, whereas a processing element of a hypercube of size N has log N ports, a processing element of an array with optical buses has a constant number of ports. Thus, it seems that an array of processors with optical buses is a promising, and could be a better, alternative for future supercomputing systems
Keywords :
computational complexity; multiprocessor interconnection networks; optical computing; optical interconnections; parallel algorithms; parallel architectures; pipeline processing; system buses; SIMD mode; array processing; computationally intensive applications; concurrent message transmission; future supercomputing systems; linear equations; nonlinear equations; optically interconnected processor arrays; parallel algorithms; parallel data movement operations; pipeline communication; pipelined optical buses; processing element; time complexities;
Journal_Title :
Computers and Digital Techniques, IEE Proceedings -
DOI :
10.1049/ip-cdt:19951621