The structure of the limit cycles in sigma delta modulation

It is shown that when the input to a sigma-delta modulator is a DC level that can be expressed as a rational number b/a, when normalized with respect to the quantizer step, the output bit string is periodic with a period that is multiple of the denominator a. On the basis of number theory, the structure of these cycles for single-loop modulators is determined and the noise contribution is computed. Around such levels the noise has two peaks, for which the maximum value and the width are proportional to the relative signal bandwidth and to the inverse of the period of the cycle, respectively. The effect of the limit cycles on the performance of the A/D and D/A converters using sigma-delta modulation is discussed. A comparison between single-loop and double-loop modulators from the point of view of this phenomena is made