Ultralow-frequency design of the Wien bridge oscillator using switched capacitors

An ultralow-frequency Wien bridge oscillator, in which resistors are replaced by switched capacitors and automatic gain controller circuitry, is reported. The oscillation frequency f is varied only by adjusting the SC clock frequency f_c without changing any element values. Experimental results show that the oscillator is stable over the oscillation frequency range from 10 μHz to 100 Hz. The linearity between f and f_c agrees with theoretical results. The device exhibits output voltage distortion of less than -40 dB within the frequency range from 100 μHz to 100 Hz. The distortion increases at frequencies below 100 μHz, resulting from an increase in output offset voltage. Very short rise times for stable oscillation is achieved by lowering the clock frequency after achieving stable oscillation at a higher clock frequency. Experiments and computer simulations are also discussed