Title :
An effective single-trap-level model for the proton-induced semi-insulating substrates
Author :
Liao, Chungpin ; Hsu, Jeng-Shin
Author_Institution :
Graduate Sch. of Electro-Opt. & Mater. Sci., Nat. Formosa Univ., Huwei, Taiwan
Abstract :
To suppress the undesirable substrate couplings, a novel approach, called the π technology (particle-enhanced isolation), was previously proposed, in which energetic proton beams were applied on the already-manufactured mixed-mode IC wafers prior to their packaging . The results of an improvement of 25-30 dB in coupling reduction and a two-to-three folds enhancement in inductor Q values were also demonstrated. The continuing improvement of this π technology has shed light on the concept of a new very large-scale integration backend solution: the particle-beam stand, a brute-force that may ultimately bring general system-on-a-chip manufacturing to a common platform. However, up to this day the physics describing properties of such proton-caused defect phase has never emerged. In this paper, the possible establishment of an effective, self-consistent, single level defect model is attempted. It will be carried out by fitting the existing single-trap-level theory with experimentally obtained parameters and the data from numerical simulations using the the stopping and range of ions in matter code (a charged-particle stopping-power calculation program). It will be revealed that, more than mere simple traps of charge carriers, those proton-created defects were also intrinsically charged (carrying +e or -e) and thus all were participating in the Rutherford-like scattering of the remaining free charge carriers which had survived the defect trapping. The calculated effective single trap level (ET) is about +0.24 eV in n-Si and -0.34 eV in p-Si, measuring from the center of the energy bandgap.
Keywords :
Rutherford backscattering; VLSI; integrated circuit manufacture; integrated circuit modelling; isolation technology; mixed analogue-digital integrated circuits; substrates; system-on-chip; Rutherford-like scattering; charge trap; coupling reduction; energy bandgap; high-Q inductor; mixed-mode integrated circuit wafer; particle-enhanced isolation; proton-induced semi-insulating substrate; semi-insulating silicon; single-trap-level model; substrate coupling; system-on-a-chip manufacturing; very large-scale integration; Charge carriers; Inductors; Integrated circuit packaging; Isolation technology; Large scale integration; Manufacturing; Optical coupling; Particle beams; Semiconductor device modeling; System-on-a-chip; Charge trap; high-; mixed-mode; semi-insulating silicon; system-on-a-chip (SOC);
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2005.860635