Characterization of oxide trap energy by analysis of the SILC roll-off regime in flash memories

We present a novel experimental technique to identify the energy of traps responsible for the stress-induced leakage current (SILC) in Flash memories, based on a standard gate-stress analysis with a drain bias used to accelerate channel electrons. From the study of the rolloff in SILC characteristics, we provide evidence for the existence of high-energy traps in the silicon dioxide, located at energies above the silicon conduction band minimum. The new technique is able to characterize the position of defects along the channel and the electron effective temperature at the SILC spot, allowing to extract the dependence of channel electron temperature on the distance from the drain.