• DocumentCode
    76690
  • Title

    Securing Processors Against Insider Attacks: A Circuit-Microarchitecture Co-Design Approach

  • Author

    Rajendran, J. ; Kanuparthi, A.K. ; Zahran, M. ; Addepalli, S.K. ; Ormazabal, G. ; Karri, R.

  • Author_Institution
    Polytech. Inst., New York Univ., New York, OH, USA
  • Volume
    30
  • Issue
    2
  • fYear
    2013
  • fDate
    Apr-13
  • Firstpage
    35
  • Lastpage
    44
  • Abstract
    Modification to traditional SoC design flow can enable effective protection against maliciously inserted rogue functionality during design and fabrication. This article presents a joint circuit-architecture-level design approach that helps in preventing or detecting Trojan attacks.
  • Keywords
    network synthesis; security; system-on-chip; SoC design flow; Trojan attack detection; circuit architecture level design; circuit microarchitecture codesign approach; fabrication; insider attack; modification; processor; rogue functionality; Computer architecture; Computer security; Encryption; Hardware; Logic gates; Program processors; Trojan horses; Circuit micro-architecture co-design; Hardware security; Hardware-based insider attacks; Logic encryption;
  • fLanguage
    English
  • Journal_Title
    Design & Test, IEEE
  • Publisher
    ieee
  • ISSN
    2168-2356
  • Type

    jour

  • DOI
    10.1109/MDAT.2013.2249554
  • Filename
    6472275
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=76690