A low power flash ADC system with fast data compression ASIC for a balloon-borne experiment

A low power multichannel flash analog-to-digital converters (FADC) system with fast data compression applications specific integrated circuits (ASICs) was developed for readout of drift chambers on a balloon-borne cosmic-ray superconducting spectrometer. The FADC system consists of up to 20 FADC modules, each of which has 32 input channels, and one interface module called crate controller. Each readout channel is equipped with a 30 Ms/s 8-bit FADC and a data compression ASIC. The data compression is executed synchronously with analog-to-digital conversion (ADC), thereby compressed data is ready for event building at almost the same time as the end of digitization. Thus, both event data size and data acquisition dead-time are reduced and the data of as many events as possible can be recorded onto a limited volume storage device on the balloon-borne apparatus. The main logic circuits of the interface module consist of one field programmable gate arrays (FPGAs), with the functions able to be changed flexibly depending on demand. The system is powered by batteries, and so special care is taken to reduce power consumption.