DocumentCode
76701
Title
A Clock Sweeping Technique for Detecting Hardware Trojans Impacting Circuits Delay
Author
Kan Xiao ; Xuehui Zhang ; Tehranipoor, Mohammad
Author_Institution
ECE Dept., Univ. of Connecticut, Storrs, CT, USA
Volume
30
Issue
2
fYear
2013
fDate
Apr-13
Firstpage
26
Lastpage
34
Abstract
Clock sweeping can be used to generate signatures for the purpose of detecting hardware Trojans. With the help of simulations and FPGA results, this article demonstrates the effectiveness of their proposed clock-sweeping technique under process variations, even for Trojans as small as a few gates.
Keywords
clocks; delay circuits; digital signatures; field programmable gate arrays; invasive software; FPGA; circuit delay; clock-sweeping technique; hardware Trojan detection; process variation; signature; Circuit layout; Computer security; Delays; Integrated circuits; Logic gates; Payloads; Synchronization; Trojan horses; Hardware Trojan; clock sweeping; delay-based detection; multidimensional scaling; outlier analysis; process variation;
fLanguage
English
Journal_Title
Design & Test, IEEE
Publisher
ieee
ISSN
2168-2356
Type
jour
DOI
10.1109/MDAT.2013.2249555
Filename
6472276
Link To Document