DocumentCode :
767298
Title :
Boundary-scan update-IEEE P1149.2 description and status report
Author :
Dervisoglu, Bulent
Author_Institution :
Hewlett-Packard, Chelmsford, MA, USA
Volume :
9
Issue :
3
fYear :
1992
fDate :
9/1/1992 12:00:00 AM
Firstpage :
79
Lastpage :
81
Abstract :
The IEEE P1149.2 Working Group is developing a standard that supports boundary scan for board-level interconnect testing and supports internal scan for device- or board-level component testing. The group´s overall objective is to establish minimal mandatory features that are adaptable to individual applications. P1149.2´s current status and the most recent proposals being considered for the standard are described
Keywords :
integrated circuit testing; logic testing; standards; IEEE P1149.2 description and status report; board-level component testing; board-level interconnect testing; boundary scan testing; standard; Clocks; Control systems; Genetic mutations; Logic testing; Proposals; Protocols; Software standards; Software tools; Standards development; System testing;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/54.156161
Filename :
156161
Link To Document :
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