Title :
VLSI design of high-speed time-recursive 2-D DCT/IDCT processor for video applications
Author :
Srinivasan, Vishnu ; Liu, K. J Ray
Author_Institution :
Crystal Semicond. Corp., Austin, TX, USA
fDate :
2/1/1996 12:00:00 AM
Abstract :
In this paper we present a full-custom VLSI design of high-speed 2-D DCT/IDCT processor based on the new class of time-recursive algorithms and architectures which has never been implemented to demonstrate its performance. We show that the VLSI implementation of this class of DCT/IDCT algorithms can easily meet the high-speed requirements of high-definition television (HDTV) due to its modularity, regularity, local connectivity, and scalability. Our design of the 8×8 DCT/IDCT can operate at 50 MHz (or have a 50 MSamples/s throughput) based on a very conservative estimate under 1.2 μ CMOS technology. In comparison to the existing designs, our approach offers many advantages that can be further explored for even higher performance
Keywords :
CMOS digital integrated circuits; VLSI; application specific integrated circuits; digital signal processing chips; digital television; discrete cosine transforms; high definition television; integrated circuit design; transform coding; video coding; CMOS technology; HDTV; VLSI design; high-definition television; high-speed time-recursive 2D DCT/IDCT processor; local connectivity; modularity; performance; regularity; scalability; time-recursive algorithms; video applications; CMOS technology; Discrete cosine transforms; Global communication; HDTV; Scalability; TV; Throughput; Transform coding; Very large scale integration; Video coding;
Journal_Title :
Circuits and Systems for Video Technology, IEEE Transactions on
