Title :
A Reduced Switching Loss PWM Strategy to Eliminate Common-Mode Voltage in Multilevel Inverters
Author :
Nho-Van Nguyen ; Tam-Khanh Tu Nguyen ; Hong-Hee Lee
Author_Institution :
Dept. of Electr. Eng., Ho Chi Minh city Univ. of Technol., Ho Chi Minh City, Vietnam
Abstract :
This paper introduces a novel pulse width modulation (PWM) technique to eliminate common-mode voltage in odd-multilevel inverters using the three zero common-mode vectors principles. Similarly, as in conventional PWM for multilevel inverters, this PWM can be properly depicted in an active two-level voltage inverter. With the help of two standardized PWM patterns, the characteristics of the PWM process can be fully explored in that active inverter as a switching time diagram and switching state sequence. Due to an unequal number of commutations of three phases in each sampling period, the switching loss is optimized by a proposed current-based mapping algorithm. The switching loss reduction can be up to 25% compared to the same PWM technique with nonoptimized algorithms. The PWM method has been then generalized as an equipotential PWM control, which is valid to both odd- and even-multilevel inverters . The theoretical analysis is verified by simulation and experimental results.
Keywords :
PWM invertors; switching convertors; vectors; PWM control; PWM process; active two-level voltage inverter; common-mode voltage elimination; current-based mapping; even-multilevel inverters; nonoptimized algorithms; odd-multilevel inverters; pulse width modulation technique; reduced switching loss; switching state sequence; switching time diagram; three zero common-mode vectors; Equivalent circuits; Inverters; Pulse width modulation; Switches; Switching loss; Vectors; Common mode voltage; Common-mode voltage (CMV); Multilevel Inverter; Pulse Width Modulation (PWM); Switching loss; multilevel inverter; pulse width modulation (PWM); switching loss;
Journal_Title :
Power Electronics, IEEE Transactions on
DOI :
10.1109/TPEL.2014.2377152