SC amplifier and SC integrator with an accurate gain of 2

Author

Lee, Kye-shin ; Choi, Yunyoung ; Maloberti, Franco

Author_Institution

Dept. of Electr. Eng., Univ. of Texas, Richardson, TX, USA

Volume

52

Issue

4

fYear

2005

fDate

4/1/2005 12:00:00 AM

Firstpage

194

Lastpage

198

Abstract

A fully differential switched-capacitor (SC) amplifier and integrator with an accurate gain of 2 are proposed. Both circuits are based on a novel capacitor mismatch compensation scheme which uses the same capacitor as the charge sampling and summing element. Therefore, the gain error which is linearly proportional to the capacitor mismatch in conventional SC circuits becomes proportional to the square of the mismatch. In addition, the proposed scheme does not require additional active blocks, and the valid output is generated within two clock cycles.

Keywords

differential amplifiers; error compensation; integrating circuits; switched capacitor networks; SC amplifier; SC integrator; capacitor mismatch compensation; charge sampling; differential switched-capacitor amplifier; gain error; summing element; switched capacitor integrator; Adders; Clocks; Differential amplifiers; Operational amplifiers; Pipelines; Sampling methods; Signal to noise ratio; Switched capacitor circuits; Switching circuits; Voltage; Capacitor mismatch; gain error; mismatch compensation; switched-capacitor (SC) circuits;

fLanguage

English

Journal_Title

Circuits and Systems II: Express Briefs, IEEE Transactions on

Publisher

ieee

ISSN

1549-7747

Type

jour

DOI

10.1109/TCSII.2005.843594

Filename

1417087