• DocumentCode
    770046
  • Title

    A unified triode/saturation model with an improved continuity in the output conductance suitable for CAD of VLSI circuits using deep sub-0.1 μm NMOS devices

  • Author

    Chen, Y.G. ; Kuo, J.B.

  • Author_Institution
    Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
  • Volume
    15
  • Issue
    2
  • fYear
    1996
  • fDate
    2/1/1996 12:00:00 AM
  • Firstpage
    256
  • Lastpage
    258
  • Abstract
    This paper reports a unified triode/saturation model with an improved continuity in the output conductance suitable for CAD of VLSI circuits using deep sub-0.1 μm NMOS devices. As verified by the experimental data, the model shows an accurate prediction of the output conductance characteristics
  • Keywords
    MOS integrated circuits; VLSI; circuit CAD; circuit analysis computing; digital simulation; electric admittance; integrated circuit design; integrated circuit modelling; CAD; VLSI; conductance characteristics prediction; deep submicron NMOS devices; output conductance; unified triode/saturation model; Electron mobility; Geometry; Integrated circuit modeling; MOS devices; Surface fitting; Threshold voltage; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.486670
  • Filename
    486670
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=770046