An efficient hardware implementation for motion estimation of AVC standard

In the advanced video coding standard (AVC), motion estimation adopts many new features such as variable block size searching, multiple reference frames, motion vector prediction, etc, for enhancing the coding performance. However, the high data dependence and high computation requirement of these new features makes the hardware implementation very complex, especially for real-time applications. Therefore base on the reference software JM9.0, this paper firstly improved the motion estimation algorithm from hardware-oriented viewpoint, and secondly proposed the systolic architecture of improved algorithm. It adopts 2-D systolic arrays, fully supports the AVC ´s variable block size matching, and can produce 41 motion vectors for one macroblock. Experimental results show that the improved algorithm can avoid the data dependences while with the same coding performance as JM9.0, and the proposed architecture can achieve the real-time requirement for 720×576 picture size at 30 fps with the search range of 65×65.