DocumentCode :
770413
Title :
Fault tolerant solid state mass memory for space applications
Author :
Cardarilli, G.C. ; Ottavi, M. ; Pontarelli, S. ; Re, M. ; Salsano, A.
Author_Institution :
Dept. of Electron. Eng., Univ. of Rome "Tor Vergata", Italy
Volume :
41
Issue :
4
fYear :
2005
Firstpage :
1353
Lastpage :
1372
Abstract :
In this paper, an innovative fault tolerant solid state mass memory (FTSSMM) architecture is described. Solid state mass memories (SSMMs) are particularly suitable for space applications and more in general for harsh environments such us, for example, nuclear accelerators or avionics. The presented FTSSMM design has been entirely based on commercial off the shelf (COTS) components. In fact, cost competitive and very high performance SSMMs cannot be easily implemented by using space qualified components, due the technological gap and very high cost characterizing these components. In order to match the severe reliability requirements of space applications a COTS-based apparatus must be designed by using suitable system level methodologies (Kluth, 1996 and Fichna, 1998). In the proposed architecture, error-correcting codes are used to strengthen the commercial dynamic random access memory (DRAM) chips, while the system controller has been designed by applying suitable fault tolerant design techniques. Different from other proposed solutions, our architecture fully exploits the reconfiguration capabilities of Reed-Solomon (RS) codes, discriminates between permanent and transient faults reducing the use of spare elements, and provides dynamic reconfiguration and graceful degradation capability, i.e., the FTSSMM performances are gracefully reduced in case of permanent faults, maintaining part of the system functionality. The paper shows the FTSSMM design methodology, the architecture, the reliability analysis, some simulation results, and a description of its implementation based on fast prototyping techniques.
Keywords :
DRAM chips; Reed-Solomon codes; error correction codes; fault tolerance; space vehicle electronics; COTS-based apparatus; Reed-Solomon codes; commercial off the shelf components; dynamic random access memory chips; dynamic reconfiguration; error-correcting codes; fault tolerant design; fault tolerant solid state mass memory; space applications; system controller; Aerospace electronics; Control systems; Costs; DRAM chips; Error correction codes; Fault tolerance; Fault tolerant systems; Memory architecture; Solid state circuits; Space technology;
fLanguage :
English
Journal_Title :
Aerospace and Electronic Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9251
Type :
jour
DOI :
10.1109/TAES.2005.1561889
Filename :
1561889
Link To Document :
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