Title :
Diffusion barrier cladding in Si/SiGe resonant interband tunneling diodes and their patterned growth on PMOS source/drain regions
Author :
Jin, Niu ; Chung, Sung-Yong ; Rice, Anthony T. ; Berger, Paul R. ; Thompson, Phillip E. ; Rivas, Cristian ; Lake, Roger ; Sudirgo, Stephen ; Kempisty, Jeremy J. ; Curanovic, Branislav ; Rommel, Sean L. ; Hirschman, Karl D. ; Kurinec, Santosh K. ; Chi, Pet
Author_Institution :
Dept. of Electr. Eng., Ohio State Univ., Columbus, OH, USA
Abstract :
Si/SiGe resonant interband tunnel diodes (RITDs) employing δ-doping spikes that demonstrate negative differential resistance (NDR) at room temperature are presented. Efforts have focused on improving the tunnel diode peak-to-valley current ratio (PVCR) figure-of-merit, as well as addressing issues of manufacturability and CMOS integration. Thin SiGe layers sandwiching the B δ-doping spike used to suppress B out-diffusion are discussed. A room-temperature PVCR of 3.6 was measured with a peak current density of 0.3 kA/cm2. Results clearly show that by introducing SiGe layers to clad the B δ-doping layer, B diffusion is suppressed during post-growth annealing, which raises the thermal budget. A higher RTA temperature appears to be more effective in reducing defects and results in a lower valley current and higher PVCR. RITDs grown by selective area molecular beam epitaxy (MBE) have been realized inside of low-temperature oxide openings, with performance comparable with RITDs grown on bulk substrates.
Keywords :
Ge-Si alloys; annealing; boron; diffusion barriers; doping profiles; elemental semiconductors; molecular beam epitaxial growth; resonant tunnelling diodes; semiconductor growth; semiconductor materials; silicon; δ-doping spikes; B delta-doped layer; B out-diffusion suppression; CMOS integration; PMOS source/drain regions; PVCR figure-of-merit; RTA temperature; Si/SiGe RITDs; Si/SiGe resonant interband tunneling diodes; Si:B-SiGe; diffusion barrier cladding; manufacturability; negative differential resistance; patterned growth; peak-to-valley current ratio; post-growth annealing; room temperature NDR; selective area MBE; selective area molecular beam epitaxy; Current measurement; Density measurement; Diodes; Germanium silicon alloys; Manufacturing; Molecular beam epitaxial growth; Resonance; Silicon germanium; Temperature; Tunneling;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2003.815375