High-performance nMOSFETs using a novel strained Si/SiGe CMOS architecture

Author

Olsen, Sarah H. ; O´Neill, Anthony G. ; Driscoll, Luke S. ; Kwa, Kelvin S.K. ; Chattopadhyay, Sanatan ; Waite, Andrew M. ; Tang, Yue T. ; Evans, Alan G R ; Norris, David J. ; Cullis, Anthony G. ; Paul, Douglas J. ; Robbins, David J.

Author_Institution

Sch. of Electr., Electron. & Comput. Eng., Newcastle Univ., UK

Volume

50

Issue

9

fYear

2003

Firstpage

1961

Lastpage

1969

Abstract

Performance enhancements of up to 170% in drain current, maximum transconductance, and field-effect mobility are presented for nMOSFETs fabricated with strained-Si channels compared with identically processed bulk Si MOSFETs. A novel layer structure comprising Si/Si_0.7Ge_0.3 on an Si_0.85Ge_0.15 virtual substrate (VS) offers improved performance advantages and a strain-compensated structure. A high thermal budget process produces devices having excellent on/off-state drain-current characteristics, transconductance, and subthreshold characteristics. The virtual substrate does not require chemical-mechanical polishing and the same performance enhancement is achieved with and without a titanium salicide process.

Keywords

Ge-Si alloys; MOSFET; carrier mobility; elemental semiconductors; semiconductor materials; silicon; Si-Si_0.7Ge_0.3; Si_0.85Ge_0.15; field effect mobility; nMOSFET; on/off-state drain current; strain compensation layer; strained Si/SiGe CMOS architecture; subthreshold characteristics; thermal budget; titanium salicide process; transconductance; virtual substrate; BiCMOS integrated circuits; CMOS technology; Consumer electronics; Effective mass; Germanium silicon alloys; MOSFETs; Marketing and sales; Silicon germanium; Substrates; Transconductance;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2003.815603

Filename

1224499