Synchronous techniques for timing recovery in BISDN

Timing recovery for an ATM network is inherently different from its circuit-switched counterpart. There are two generic approaches to ATM timing recovery, namely, non-synchronous methods which rely on cell jitter filtering and synchronous methods which use a common reference clock. The latter approach has better jitter/wander performance. This is particularly significant for circuit emulation of existing hierarchical signals (e.g. DSn signals), which have stringent jitter/wander requirements. This paper compares several methods for timing recovery in a synchronous network environment and discusses the fundamental concept, implementation, and performance of three synchronous techniques: synchronous frequency encoding technique (SFET), time stamp (TS), and synchronous residual time stamp (SRTS). Among these methods, it is concluded that the SRTS method, invented by the authors, is the most efficient. SRTS has been accepted by ITU-T as the timing recovery standard for AAL-1 (ATM Adaptation Layer-Circuit Emulation). Practical implementation considerations of the SRTS technique and its robustness against cell loss are also examined in this paper. In addition, it is shown that a strong analogy can be drawn between SRTS and conventional pulse stuffing synchronization techniques so that the jitter performance for SRTS is comparable to that of the circuit-switched network.<>