Analysis of a Digital Bit Synchronizer

A simple digital bit synchronizer utilizing discrete phase control is discussed. The proposed system is intended for operation with NRZ coded binary signals. A finite state Markov chain model is used to evaluate the steady-state phase jitter performance of the bit synchronizer in the presence of additive white Gaussian noise. The theoretical results are confirmed by computer simulation. The same mathematical model is used to investigate the transient (acquisition) performance of the synchronizer. Finally, the performance of the synchronizer as a data detector is discussed and the error probability performance is compared with that of the optimum detector.