• DocumentCode
    770860
  • Title

    Three-transistor one-time programmable (OTP) ROM cell array using standard CMOS gate oxide antifuse

  • Author

    Kim, Jinbong ; Lee, Kwyro

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., KAIST, South Korea
  • Volume
    24
  • Issue
    9
  • fYear
    2003
  • Firstpage
    589
  • Lastpage
    591
  • Abstract
    A three-transistor (3-T) cell CMOS one-time programmable (OTP) ROM array using CMOS antifuse (AF) based on permanent breakdown of MOSFET gate oxide is proposed, fabricated and characterized. The proposed 3-T OTP cell for ROM array is composed of an nMOS AF, a high-voltage blocking nMOS, and cell access transistor, all compatible with standard CMOS technology. The experimental results show that the proposed structure can be a viable technology option of high-density CMOS OTP ROM array for modern digital as well as analog circuits.
  • Keywords
    CMOS memory circuits; PROM; semiconductor device breakdown; CMOS gate oxide antifuse; MOSFET gate oxide breakdown; cell access transistor; high-voltage blocking nMOS; three-transistor one-time programmable ROM cell array; CMOS analog integrated circuits; CMOS digital integrated circuits; CMOS logic circuits; CMOS memory circuits; CMOS process; CMOS technology; Electric breakdown; MOS devices; Random access memory; Read only memory;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2003.815429
  • Filename
    1224527