Vector-Matrix Multiply and Winner-Take-All as an Analog Classifier

Author

Ramakrishnan, Shankar ; Hasler, J.

Author_Institution

Dept. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA

Volume

22

Issue

2

fYear

2014

fDate

Feb. 2014

Firstpage

353

Lastpage

361

Abstract

The vector-matrix multiply and winner-take-all structure is presented as a general-purpose, low-power, compact, programmable classifier architecture that is capable of greater computation than a one-layer neural network, and equivalent to a two-layer perceptron. The classifier generates event outputs and is suitable for integration with event-driven systems. The main sources of mismatch, temperature dependence, and methods for compensation are discussed. We present measured data from simple linear and nonlinear classifier structures on a 0.35-μm chip and analyze the power and computing efficiency for scaled structures.

Keywords

analogue integrated circuits; compensation; low-power electronics; perceptrons; analog classifier; computing efficiency; low-power classifier; mismatch compensation; nonlinear classifier structures; one-layer neural network; programmable classifier architecture; simple linear structures; temperature dependence; two-layer perceptron; vector-matrix multiply; winner-take-all structure; Analog computing; classifiers; computing efficiency; reconfigurable;

fLanguage

English

Journal_Title

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

Publisher

ieee

ISSN

1063-8210

Type

jour

DOI

10.1109/TVLSI.2013.2245351

Filename

6519956