Efficient residue-to-binary conversion technique with rounding error compensation

Author

Kim, Jin Yul ; Park, Kyu Ho ; Lee, Hwang Soo

Author_Institution

Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol, Seoul, South Korea

Volume

38

Issue

3

fYear

1991

fDate

3/1/1991 12:00:00 AM

Firstpage

315

Lastpage

317

Abstract

An improved scaled-decoding technique (defined as residue-to-binary conversion of which outputs are scaled by a constant) for hardware implementations in the residue number system (RNS) is presented. The technique is based on the Chinese remainder theorem and is equipped with a rounding error compensation circuit that can reduce the maximum scaling error below 0.5 least-significant-bit (LSB) for general four-moduli RNS, and down to about 0.53 LSB for general six-moduli RNS with a moderate amount of additional hardware

Keywords

computerised signal processing; data conversion; decoding; digital arithmetic; error compensation; Chinese remainder theorem; four-moduli RNS; hardware implementations; maximum scaling error; residue number system; residue-to-binary conversion technique; rounding error compensation; scaled-decoding technique; six-moduli RNS; Adders; Cathode ray tubes; Circuits; Decoding; Digital signal processing; Hardware; Process design; Roundoff errors; Signal design; Signal processing algorithms;

fLanguage

English

Journal_Title

Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0098-4094

Type

jour

DOI

10.1109/31.101324

Filename

101324