DocumentCode
772035
Title
DC-Balance Low-Jitter Transmission Code for 4-PAM Signaling
Author
Chen, Hsiao-Yun ; Lin, Chih-Hsien ; Jou, Shyh-Jye
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu
Volume
53
Issue
9
fYear
2006
Firstpage
827
Lastpage
831
Abstract
This investigation proposes a novel dc-balanced low-jitter transmission code, a 4-PAM symmetric code, for a 4-PAM signaling system. The 4-PAM symmetric code preserves all of the useful characteristics of the 8B/10B code such as dc-balanced serial data and guaranteed transitions in the symbol stream for clock recovery. Moreover, the proposed method decreases the jitter of the timing transition of the data in the receiver and consumes half of the data bandwidth, because it transmits in 4-PAM. The design results using the UMC 0.18-mum process demonstrate that the new transmission code can decrease the jitter of the transition point by plusmn25%; of the transition region. The operation speed of the encoder/decoder for the 4-PAM symmetric code is 819 MHz with 16-b inputs (13.1 Gb/s) and 704 MHz with 16-b outputs (11.3 Gb/s)
Keywords
decoding; encoding; jitter; pulse amplitude modulation; synchronisation; 0.18 micron; 13.1 Gbit/s; 16 bit; 4-PAM signaling; 704 MHz; 819 MHz; clock recovery; dc-balanced serial data; symmetric code; timing transition; transition jitter; transmission code; Asynchronous transfer mode; Bandwidth; Cities and towns; Clocks; Communication system signaling; Data communication; Decoding; Phase noise; Sampling methods; Timing jitter; 4-PAM; 8B/10B code; Low jitter; transmission code;
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2006.879094
Filename
1705048
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