• DocumentCode
    772547
  • Title

    SDAARC: an extended cache-only memory architecture

  • Author

    Eschmann, Frank ; Klauer, Bernd ; Moore, Ronald ; Waldschmidt, Klaus

  • Author_Institution
    Johann Wolfgang Goethe Univ., Frankfurt, Germany
  • Volume
    22
  • Issue
    3
  • fYear
    2002
  • Firstpage
    62
  • Lastpage
    70
  • Abstract
    An established data distribution paradigm - extended to include automatic distribution of instruction sequences - might help overcome the traditional difficulties associated with parallel programming. The self-distributing associative architecture (SDAARC) that we describe is based on the cache-only memory architecture concept, but extends the data migration mechanisms with migrating microthreads and a scheduling concept. We present the architecture in a top-down fashion, consider it first as a complete system consisting of compiler and runtime technology, then examine the compiler technology and the runtime system in greater detail
  • Keywords
    cache storage; content-addressable storage; distributed processing; memory architecture; program compilers; SDAARC; cache-only memory architecture; compiler; data migration; runtime system; self-distributing associative architecture; Computer aided instruction; Computer architecture; Concurrent computing; Distributed computing; Memory architecture; Network servers; Parallel processing; Parallel programming; Processor scheduling; Scientific computing;
  • fLanguage
    English
  • Journal_Title
    Micro, IEEE
  • Publisher
    ieee
  • ISSN
    0272-1732
  • Type

    jour

  • DOI
    10.1109/MM.2002.1013305
  • Filename
    1013305