Leakage current of undoped LPCVD polycrystalline silicon thin-film transistors

The leakage current of thin-film transistors on undoped polycrystalline silicon layers, deposited by low-pressure chemical vapor deposition, is investigated in relation to the deposition pressure. For films deposited at pressure 40 mTorr, the leakage current I_L is controlled by the intrinsic resistivity of the film. The increase of the current I_L with increasing gate and drain bias voltages is due to the Joule-induced-heating effect. For films deposited at pressures below 40 mTorr, the leakage current is controlled by the reverse-biased junction at the drain end. In this case, the minimum leakage current is modeled as thermal generation current arising from midgap Coulombic defect trap states. When the gate and drain bias voltages are increased, the thermally generated current is enhanced by the Poole-Frenkel effect due to high electric fields at the drain junction. Such high electric fields at the drain end can arise from doping inhomogeneities because of fast diffusion through the grain boundaries of the implanted drain dopant. At high bias voltages, a deviation from linearity of the Poole-Frenkel current-voltage characteristics is observed due to the hot carrier effect