• DocumentCode
    772857
  • Title

    Timing analysis with crosstalk is a fixpoint on a complete lattice

  • Author

    Zhou, Hai

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Northwestern Univ., Evanston, IL, USA
  • Volume
    22
  • Issue
    9
  • fYear
    2003
  • Firstpage
    1261
  • Lastpage
    1269
  • Abstract
    Increasing delay variation due to capacitive and inductive crosstalk has a dramatic impact on deep submicron technologies. It is now impossible to exclude crosstalk from timing analysis. However, timing analysis with crosstalk is a mutual dependence problem since the crosstalk effect in turn depends on the timing behavior of a circuit. In this paper, we establish a theoretical foundation for timing analysis with crosstalk. We show that solutions to the problem are fixpoints on a complete lattice. Based on that, we prove in general the convergence of any iterative approach. We also show that, starting from different initial solutions, an iterative approach will reach different fixpoints. The current prevailing practice, which starts from the worst case solution, will always reach the greatest fixpoint, which is the loosest solution. In order to reach the least fixpoint, we need to start from the best case solution. The convergence rates for both discrete and continuous models are discussed. Based on chaotic iteration and heterogeneous structures of coupled circuits, techniques to speed up iterations are also provided.
  • Keywords
    VLSI; circuit analysis computing; convergence of numerical methods; crosstalk; delays; integrated circuit noise; iterative methods; timing; capacitive crosstalk; chaotic iteration; continuous models; convergence rates; coupled circuits; deep submicron technologies; delay variation; different initial solutions; discrete models; heterogeneous structures; inductive crosstalk; iterative approach; lattice theory; mutual dependence problem; noise; timing analysis; timing behavior; Capacitance; Coupling circuits; Crosstalk; Delay; Integrated circuit noise; Iterative methods; Lattices; Switches; Timing; Wires;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2003.816211
  • Filename
    1225816