Analysis and simulation of distortion in folding and interpolating A/D converters

Author

Limotyrakis, Sotirios ; Nam, KiYoung ; Wooley, Bruce A.

Author_Institution

Center for Integrated Syst., Stanford Univ., CA, USA

Volume

49

Issue

3

fYear

2002

fDate

3/1/2002 12:00:00 AM

Firstpage

161

Lastpage

169

Abstract

A method for analyzing distortion in a complementary metal-oxide-semiconductor (CMOS) analog-to-digital (A/D) converter with continuous-time folding and interpolation is presented. Distortion resulting from limited bandwidth at the output of the folders, interpolation at the output of the folders, and comparator offset are considered. Simulation results are presented for a range of architectural configurations, and means of extending the method to include the effect of other nonidealities are considered. The present analysis can be used to estimate distortion in A/D converters employing continuous-time folding and aid in the decision of whether to incorporate a track-and-hold circuit at the input of the converter

Keywords

CMOS integrated circuits; Fourier series; analogue-digital conversion; circuit simulation; electric distortion; frequency-domain analysis; interpolation; transfer functions; CMOS ADC; comparator offset; continuous-time folding; distortion simulation; flash ADC; folding A/D converters; frequency domain calculations; interpolating A/D converters; limited bandwidth; nonidealities; square law I-V characteristic; track-and-hold circuit; transfer function; zero-crossings; Analog-digital conversion; Analytical models; Bandwidth; CMOS technology; Circuits; Delay; Frequency; Interpolation; Nonlinear distortion; Signal resolution;

fLanguage

English

Journal_Title

Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on

Publisher

ieee

ISSN

1057-7130

Type

jour

DOI

10.1109/TCSII.2002.1013862

Filename

1013862