Charge-based capacitance measurements (CBCM) on MOS devices

Author

Sell, Bernhard ; Avellán, Alejandro ; Krautschneider, Wolfgang H.

Author_Institution

Infineon Technol., Dresden, Germany

Volume

2

Issue

1

fYear

2002

fDate

3/1/2002 12:00:00 AM

Firstpage

9

Lastpage

12

Abstract

A new simple method of measuring capacitance-voltage characteristics of MOS devices is presented. Proceeding from the charge-based capacitance measurement technique suggested recently, a compact test structure with high resolution has been developed, which only requires measurement of do quantities. The method was tested on a 0.6-μm CMOS process with small and large area capacitors and compared to well-known high-frequency capacitance-voltage results. Beside using a reference structure, a second means of extracting parasitic effects is demonstrated for small structures. The test structure allows measurements in a wide frequency range with high accuracy and low noise contribution at small capacitance levels

Keywords

MIS structures; MOS capacitors; MOSFET; capacitance measurement; semiconductor device measurement; CMOS process; DC quantities; MOS capacitor; MOS devices; MOS structures; PFET; capacitance-voltage characteristics; charge-based capacitance measurements; compact test structure; effective gate voltage; high resolution; interface traps; large area capacitors; parasitic effects; reference structure; small area capacitors; CMOS process; Capacitance measurement; Capacitance-voltage characteristics; Current measurement; Frequency measurement; MOS capacitors; MOS devices; Noise level; Noise measurement; Testing;

fLanguage

English

Journal_Title

Device and Materials Reliability, IEEE Transactions on

Publisher

ieee

ISSN

1530-4388

Type

jour

DOI

10.1109/TDMR.2002.1014667

Filename

1014667