Improving fMAX/fTratio in FinFETs using source/drain extension region engineering

A design methodology to optimise the ratio of maximum oscillation frequency to cutoff frequency, f _MAX/f _T, in 60 nm FinFETs is presented. Results show that 25 to 60 improvement in f _MAX/f _T at drain currents of 20-300 muA/mum can be achieved in a non-overlap gate-source/drain architecture. The reported work provides new insights into the design and optimisation of nanoscale FinFETs for RF applications.