DocumentCode
774361
Title
A loop partition technique for reducing cache bank conflict in multithreaded architecture
Author
Wu, C.-C. ; Chen, C.
Author_Institution
Dept. of Comput. Sci. & Inf. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume
143
Issue
1
fYear
1996
fDate
1/1/1996 12:00:00 AM
Firstpage
30
Lastpage
36
Abstract
Parallel multithreaded architectures take advantage of the ability to execute more than one thread simultaneously on a single chip at low synchronisation and communication costs and high hardware resource utilisation. However, a high bandwidth cache, such as a multibank cache, is especially critical to serve memory accesses issued at the same time from different threads. To prevent bank conflicts of multibank cache from seriously degrading system performance, a loop partition method is proposed to reduce or even eliminate bank conflicts. The thread access to certain prevents any two from accessing the same bank module. The method neither slows down the clock rate nor increases the array subscript expression complexity. The performance gains of the bank-conflict-free loop partition approach are shown in simulation results
Keywords
cache storage; parallel architectures; array subscript expression complexity; bank conflicts; cache bank conflict; high bandwidth cache; loop partition technique; memory accesses; multithreaded architecture; parallel multithreaded architectures; performance gains;
fLanguage
English
Journal_Title
Computers and Digital Techniques, IEE Proceedings -
Publisher
iet
ISSN
1350-2387
Type
jour
DOI
10.1049/ip-cdt:19960007
Filename
487922
Link To Document