DocumentCode :
774430
Title :
High quality SiO/sub 2//Si interfaces of poly-crystalline silicon thin film transistors by annealing in wet atmosphere
Author :
Sano, Naoki ; Sekiya, Mitsunobu ; Hara, Masaki ; Kohno, Atsushi ; Sameshima, Toshiyuki
Author_Institution :
Res. Center, Sony Corp., Yokohama, Japan
Volume :
16
Issue :
5
fYear :
1995
fDate :
5/1/1995 12:00:00 AM
Firstpage :
157
Lastpage :
160
Abstract :
A new post-metallization annealing technique was developed to improve the quality of metal-oxide-semiconductor (MOS) devices using SiO/sub 2/ films formed by a parallel-plate remote plasma chemical vapor deposition as gate insulators. The quality of the interface between SiO/sub 2/ and crystalline Si was investigated by capacitance-voltage (C-V) measurements. An H/sub 2/O vapor annealing at 270/spl deg/C for 30 min efficiently decreased the interface trap density to 2.0/spl times/10/sup 10/ cm/sup -2/ eV/sup -1/, and the effective oxide charge density from 1/spl times/10/sup 12/ to 5/spl times/10/sup 9/ cm/sup -2/. This annealing process was also applied to the fabrication of Al-gate polycrystalline silicon thin film transistors (poly-Si TFT´s) at 270/spl deg/C. In p-channel poly-Si TFT´s, the carrier mobility increased from 60-400 cm/sup 2/ V/sup -1/ s/sup -1/ and the threshold voltage decreased from -5.5 to -1.7 V.<>
Keywords :
MOSFET; annealing; carrier mobility; elemental semiconductors; interface states; plasma CVD; semiconductor-insulator boundaries; silicon; silicon compounds; thin film transistors; -1.7 V; 270 C; 30 min; Al-SiO/sub 2/-Si; Al-gate polysilicon TFT; C-V measurements; H/sub 2/O; H/sub 2/O vapor annealing; MOS devices; annealing; capacitance-voltage measurements; carrier mobility; effective oxide charge density; fabrication; gate insulators; high quality SiO/sub 2//Si interfaces; interface trap density; p-channel poly-Si TFT; parallel-plate remote plasma CVD; plasma chemical vapor deposition; polycrystalline Si; post-metallization annealing technique; thin film transistors; threshold voltage; wet atmosphere; Annealing; Capacitance-voltage characteristics; Chemical vapor deposition; Insulation; Metal-insulator structures; Plasma chemistry; Plasma density; Plasma devices; Plasma measurements; Thin film transistors;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.382225
Filename :
382225
Link To Document :
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