DocumentCode :
774521
Title :
VLSI architectures for computing X mod m
Author :
Sivakumar, R. ; Dimopoulos, N.J.
Author_Institution :
PMC-Sierra Inc., Burnaby, BC, Canada
Volume :
142
Issue :
5
fYear :
1995
fDate :
10/1/1995 12:00:00 AM
Firstpage :
313
Lastpage :
320
Abstract :
The implementation of residue number system based arithmetic processors has been made feasible by the recent developments in microelectronics. New VLSI architectures are proposed for computing the integer module operation X mod m, when m is restricted to the values 2 k, 2k±1 and composite numbers whose mutually prime factors fall in the above category. Two different design methodologies, namely the recursive and partition methods are presented, and their respective VLSI computational complexities are analysed. A VLSI chip that computes X mod m, where X is a 16-bit number and m=3, 5, 6, 7, 9 and 10, has been implemented using the proposed schemes in 3 μm CMOS technology, and typical measurements have yielded a propagation delay of less than 109 ns
Keywords :
CMOS logic circuits; VLSI; computational complexity; logic CAD; residue number systems; 109 ns; 3 micron; RNS based arithmetic processors; VLSI architectures; computational complexities; integer module operation; partition method; recursive method; residue number system;
fLanguage :
English
Journal_Title :
Circuits, Devices and Systems, IEE Proceedings -
Publisher :
iet
ISSN :
1350-2409
Type :
jour
DOI :
10.1049/ip-cds:19952105
Filename :
487938
Link To Document :
بازگشت