Title :
An integrated framework for yield management and defect/fault reduction
Author :
Weber, Charles ; Moslehi, Bizhan ; Dutta, Manjari
Author_Institution :
Technol. Dev. Center, Hewlett-Packard Co., Palo Alto, CA, USA
fDate :
5/1/1995 12:00:00 AM
Abstract :
An integrated framework for yield management and defect/fault reduction is presented. A 3D space consisting of a quality axis, a process integration axis, and a scaling axis encompasses all process and manufacturing parameters. Cross-functional teams of process, equipment, operations, and materials personnel proactively explore this space, and provide process engineers with a stable and capable environment for process development and manufacturing activities
Keywords :
ULSI; VLSI; integrated circuit yield; quality control; IC manufacture; defect reduction; fault reduction; integrated framework; manufacturing parameters; process integration axis; quality axis; scaling axis; yield management; Circuit faults; Computer crashes; Integrated circuit yield; Manufacturing processes; Personnel; Process control; Quality management; Space exploration; Space technology; Very large scale integration;
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
